The present document is based on Japanese Priority Document JP 2000-182037, filed in the Japanese Patent Office on Jun. 16, 2000, the entire contents of which being incorporated herein by reference.
1. Field of the Invention
The present invention relates to a method for growing a semiconductor layer made of a nitrogen-containing (also referred to as xe2x80x9cnitride-basexe2x80x9d hereinafter) III-V group compound, and a method for fabricating semiconductor light emitting elements using such method for growing a semiconductor layer.
2. Description of the Related Art
Nitride-base III-V group compound semiconductor typified by gallium nitride (GaN) (also referred to as xe2x80x9cGaN-base semiconductorxe2x80x9d hereinafter) is a promising material for a light emitting element capable of emitting light in a green to blue spectral region, and even in a ultraviolet region.
In particular, such GaN-base semiconductor has attracted a great deal of attention since a light emitting diode (LED) using thereof was put into practical use. A semiconductor laser using such GaN-base semiconductor has also been reported as successful, and is expected to be applied to an optical pick-up of a device (also referred to as an optical disk device) such as a DVD (digital versatile disk) such that performing read (reproduction) or write (recording) operation to or from an optical recording medium (also referred to as an optical disk) which optically stores information.
FIG. 4 is a perspective view showing such GaN-base semiconductor light emitting element (laser diode LD) having a general constitution fabricated on a sapphire substrate.
On a sapphire substrate 11, a GaN-base semiconductor layer which includes an active layer 16 having a multiple quantum well structure is stacked, all of which compose a semiconductor stack 10.
In such semiconductor stack 10, a p-type cladding layer and an n-type cladding layer are formed so as to sandwich the active layer 16, where a p-electrode 10a and an n-electrode 10b are formed so as to be respectively connected to such cladding layers. Since the sapphire substrate 11 is an insulating material, a semiconductor layer which is connected to the n-type cladding layer or an extended portion 10c of such n-type cladding layer per se is formed on the sapphire substrate 11 so as to projected out from the semiconductor stack 10, and further thereon such n-electrode 10b is formed.
When a predetermined voltage is applied from a power source B between such p-electrode 10a and the n-electrode 10b, the active layer 16 within the semiconductor stack 10 emits laser light L.
FIG. 5A is a sectional view showing in more detail a portion of the foregoing semiconductor stack 10.
In such constitution, a buffer layer 12 typically made of GaN is formed on the sapphire substrate 11, and further thereon an n-type GaN layer (contact layer) 13 of approx. 5.0 xcexcm thick, an n-type AlGaN layer (cladding layer) 14 of approx. 0.5 xcexcm thick, an n-type GaN layer (guide layer) 15 of approx. 0.1 xcexcm thick, the active layer (light emitting layer) 16 having a multiple quantum well (MQW) structure typically made of GaInN, a p-type AlGaN layer (cap layer) 17 of approx. 0.02 xcexcm, a p-type GaN layer (guide layer) 18 of approx. 0.1 xcexcm thick, a p-type AlGaN layer (cladding layer) 19 of approx 0.5 xcexcm thick, and a p-type GaN layer (contact layer) 20 of approx. 0.1 xcexcm thick are stacked in this order.
As for the layers described in the above, an n-type impurity (donor impurity) to be doped into the n-type layers can be silicon (Si) or the like, and a p-type impurity (acceptor impurity) to be doped into the p-type layers can be magnesium (Mg), zinc (Zn) or the like.
FIG. 5B is a schematic view showing a potential profile of such active layer 16 having a multiple quantum well structure.
Such quantum well structure is attained by a constitution of the active layer 16 in which layers individually having an indium (In) content of 2% and 8%, which differ in the potential, are alternatively stacked with each other.
A method for fabricating such GaN-base semiconductor light emitting element (laser diode LD) will be explained.
Fabrication of a light emitting element or the like using the GaN-base semiconductor requires such GaN-base semiconductor to be grown on a substrate made of sapphire, SiC or the like in a multi-layered manner. Typical methods for growing the GaN-base semiconductor include the metal-organic chemical vapor deposition (MOCVD) process and the molecular beam epitaxy (MBE) process, where the former is advantageous on the practical basis and is widely used since it does not require a high degree of vacuum.
In the above-mentioned MOCVD process, a substrate to be processed is placed in an MOCVD reaction chamber (reactor) typically made of quartz glass, to which ammonia (NH3) as a nitrogen source and other source materials such as gallium (Ga), aluminum (Al) and indium (In) depending on a GaN-base semiconductor to be grown are supplied together with a carrier gas, while being heated by, for example, an RF coil surrounding such reaction chamber, to thereby grow the GaN-base semiconductor on such target substrate housed in the reaction chamber.
A method for growing the multiple GaN-base semiconductor layers whose constitution is shown in FIG. 5A will be explained referring to FIGS. 6A and 6B.
As shown in FIG. 6A, the sapphire substrate 11 having the c-plane exposed on the surface thereof is subjected to thermal cleaning, and further thereon the buffer layer 12 typically made of GaN, the n-type GaN layer (contact layer) 13 of approx. 5.0 xcexcm thick, the n-type AlGaN layer (cladding layer) 14 of approx. 0.5 xcexcm thick and the n-type GaN layer (guide layer) 15 of approx. 0.1 xcexcm thick are stacked by crystal growth in this order.
An n-type impurity (donor impurity) available for the doping into the foregoing n-type layers in the above process is represented by silicon (Si).
Next, as shown in FIG. 6B, the active layer (light emitting layer) 16 having a multiple quantum well (MQW) structure made of GaInN is formed through crystal growth by the MOCVD process on the n-type GaN layer 15.
The p-type AlGaN layer (cap layer) 17 of approx. 0.02 xcexcm, the p-type GaN layer (guide layer) 18 of approx. 0.1 xcexcm thick, the p-type AlGaN layer (cladding layer) 19 of approx. 0.5 xcexcm thick, and the p-type GaN layer (contact layer) 20 of approx. 0.1 xcexcm thick are then formed on the active layer 16 in this order through crystal growth by the MOCVD process, to thereby obtain a structure shown in FIG. 5A.
The p-Type impurities (acceptor impurity) available for the doping into the foregoing p-type layers in the above process include magnesium (Mg) and zinc (Zn).
In the successive process steps, the extended portion 10c of the n-type cladding layer as shown in FIG. 4 is formed by etching, electrodes 10a, 10b are formed, and end planes for allowing laser oscillation are formed for example by etching, to thereby obtain a desired laser diode.
Such laser diode LD is produced by a crystal growth method such as the MOCVD process, and thus generally employs a sapphire substrate.
There is, however, a large lattice mismatch between the sapphire substrate and the GaN layer, which results in a large number of threading dislocation introduced into the semiconductor stack composed of the GaN layers, and ruins reliability of the obtained element.
A method for obtaining a high-quality crystal area with less threading dislocation has thus been proposed in which a GaN layer of approx. 1 to 3 xcexcm thick (typically 2 xcexcm) is grown on the sapphire substrate, etching the GaN layer so as to leave such GaN layer on the sapphire substrate projected in a ridge form, and a new GaN layer is laterally grown from the side planes of the individual ridges, to thereby deflect and converge the threading dislocation.
Such growth method for the semiconductor layer will be explained referring to the drawings.
First as shown in FIG. 7A, the c-plane of the sapphire substrate 11 is subjected to thermal cleaning, and a GaN layer of approx. 1 to 3 xcexcm thick (typically 2 xcexcm) is grown by the MOCVD process to thereby form a first semiconductor layer 12a. 
Next, a photosensitive resin is coated on the entire surface of the first semiconductor layer 12a, and such coated film is then patterned by photolithographic processes such as light exposure and development to thereby form a resist film R on the first semiconductor layer 12a for protecting thereof selectively in a region to be remained, as shown in FIG. 7B.
Next, as shown in FIG. 7C, the first semiconductor layer 12a is etched while being masked with the resist film R, to thereby form first semiconductor layers 12b projected in a ridge form on the sapphire substrate 11.
Each first semiconductor layer 12b is 1 to 3 xcexcm high and 3 xcexcm wide, and such ridge-formed first semiconductor layers 12b are repetitively formed over the entire surface of the sapphire substrate 11 with 10-xcexcm intervals.
Thereafter the etching is further proceeded to lower the surface level of the sapphire substrate 11 so that such sapphire substrate 11 will be projected in portions where the first semiconductor layers 12b are formed.
Next, the resist film R is removed typically by ashing as shown in FIG. 8A, and on the surface of the first semiconductor layers 12b a second semiconductor layer 12 again comprising GaN similarly to the first semiconductor layers 12b is grown in vapor phase under a condition by which a growth rate Gb in a direction parallel to a major plane of the sapphire substrate 11 is larger than a growth rate Ga in a direction perpendicular thereto.
In such process, the pressure in a reaction chamber in which the vapor phase growth proceeds is controlled at 26,600 Pa (200 Torr) or around. Such control allows a (11-20) plane to appear on the side plane S of the second semiconductor layer 12, which is perpendicular to the bottom plane of the second semiconductor layer 12.
Continuing such vapor-phase growth of the second semiconductor layer 12 will result in fusion of the portions of the second semiconductor layer 12 individually grown from the surface of the adjacent first semiconductor layers 12b, and thereafter only the growth in the direction perpendicular to the major plane of the sapphire substrate 11 will continue, as shown in FIG. 8C.
By further continuing the growth of the second semiconductor layer 12, the sapphire substrate 11 having a GaN layer (first semiconductor layers 12b and second semiconductor layer 12) formed thereon is obtained as shown in FIG. 9A.
Using such GaN layer comprising the first semiconductor layers 12b and the second semiconductor layer 12 as a buffer layer, and further forming thereon through crystal growth an n-type contact layer, an n-type cladding layer, an n-type guide layer, an active layer (light emitting layer), a p-type cap layer, a p-type guide layer, a p-type cladding layer and a p-type contact layer in this order can produce a desired semiconductor light emitting element.
The GaN layer (second semiconductor layer 12) thus grown partially has a high-quality crystal area having a less amount of threading dislocation since the threading dislocation is deflected and converged during the lateral growth from the side plane of the ridge-formed GaN film (first semiconductor layer 12b). So that fabricating a light emitting portion of a light emitting element in such high-quality area allows the light emitting element to improve the light emitting property and the lifetime thereof.
A problem, however, resides in that the second semiconductor layer 12 thus obtained tends to have large voids V in areas where the portions of the second semiconductor layer 12 individually grown from the adjacent first semiconductor layers 12b fuse with each other. Such large voids V will interfere lateral current flow of an element fabricated thereon.
Another problem resides in that the c-axis may incline in thus grown second semiconductor layer 12.
The X-ray diffractometry (XRD) of such second semiconductor layer 12 shows a three-split peak, which implies a presence of a crystal area having an inclined c-axis.
A still another problem resides in that the second semiconductor layer 12 thus formed tends to have lateral defects in the vicinity of the areas where the portions of the second semiconductor layer 12 individually grown from the adjacent first semiconductor layers 12b fuse with each other.
FIG. 9B is a schematic drawing illustrating an image obtained from a TEM (transmission electron microscope) observation. While threading dislocations T extend upward from the upper plane of the first semiconductor layers 12b and the location of the voids V, a lot of other defects D were found to occur in the lateral direction also in the area grown in the lateral direction (in-plane direction of the substrate) containing a less amount of such threading dislocations T.
It is therefore an object of the present invention to provide a method for growing a semiconductor layer by which the size of the generable voids is controllable, inclination of the c-axis of the semiconductor crystal is avoidable and the defects in the semiconductor layer is reducible, and as well as to provide a method for fabricating a semiconductor light emitting element using such semiconductor layer.
To accomplish the foregoing object, a method for growing a semiconductor layer of the present invention comprises for a step of forming on a substrate a first semiconductor layer made of a III-V group compound so as to have a projected form; and a step of growing in vapor phase on the surface of the first semiconductor layer a second semiconductor layer made of a III-V group compound under a condition by which a growth rate in a direction parallel to a major plane of the substrate is larger than a growth rate in a direction perpendicular thereto; wherein the step of the vapor-phase growth includes a process for growing the second semiconductor layer so that side planes thereof incline at an acute angle to a bottom plane thereof.
In such method for growing a semiconductor layer according to the present invention, the acute angle between the side planes and the bottom plane of the second semiconductor layer is preferably attained by controlling the pressure in a reaction chamber in which the vapor phase growth proceeds in the step for growing such second semiconductor layer.
In particular, it is preferable to control the pressure in a reaction chamber, in which the vapor phase growth proceeds in the step of growing such second semiconductor layer, to be 53,200 Pa (400 Torr) or above.
In such method for growing a semiconductor layer according to the present invention, it is more preferable that the step for forming the first semiconductor layer further comprises a step for forming such first semiconductor layer on the entire surface of the substrate; and a step for processing such first semiconductor layer so as to have a predetermined pattern.
More preferably, the step for processing the first semiconductor layer further comprises a step for patterning a resist film for protecting such first semiconductor layer in a portion to be remained; and a step for etching the first semiconductor layer while being masked with such resist film, wherein additional etching is proceeded after the completion of the etching of the first semiconductor layer so as to lower the surface level of the substrate, to thereby attain a surface figuration of the substrate such that being projected in an area such first semiconductor layer remains.
In such method for growing a semiconductor layer according to the present invention, it is preferable that the side planes of the second semiconductor layer inclined at an acute angle to the bottom plane thereof have a (11-22) crystal plane.
In such method for growing a semiconductor layer according to the present invention, it is preferable that the first semiconductor layer and the second semiconductor layer individually comprise a GaN layer.
According to the method for growing a semiconductor layer of the present invention, the first semiconductor layer is formed on the entire surface of the substrate, the resist film is formed on the first semiconductor layer so as to protect a portion thereof to be remained, the first semiconductor layer is etched while being masked with the resist film, the substrate is further etched to lower the surface level thereof so as to attain a surface figuration thereof such that being projected in an area where the first semiconductor layer remains, to thereby process the first semiconductor layer typically comprising GaN, one of III-V compound semiconductor, into a predetermined projected pattern on the substrate.
The second semiconductor layer typically comprising GaN, one of III-V compound semiconductor, is then formed on the first semiconductor layer under a condition by which a growth rate in the direction parallel to the major plane of the substrate is larger than a growth rate in the direction perpendicular thereto. The pressure of the reaction chamber in which the vapor phase growth proceeds is now controlled typically at 53,200 Pa (400 Torr) or above to thereby allow the (11-22) plane to appear on the side planes of the second semiconductor layer, which means that the side planes of the second semiconductor layer incline at an acute angle to the bottom plane thereof.
Since the method for growing a semiconductor layer of the present invention allows the second semiconductor layer to grow so as to keep the acute angle between the side planes and bottom plane thereof, fusion of the portions of the second semiconductor layers individually grown from the adjacent first semiconductor layers will proceed in a gradual manner from the side close to the substrate. This successfully prevents the reaction gas from being shut out over the second semiconductor layer and reduces the size of the voids generable at the site of fusion.
Since the process is also beneficial in suppressing the stress applied to the second semiconductor layer at the time of the fusion of the portions thereof individually grown from the adjacent first semiconductor layers, the inclination of the c-axis of the semiconductor crystal will be suppressed, and defects generable in the lateral direction (in-plane direction of the substrate) within such semiconductor layer will be reduced.
To accomplish the foregoing object, a method for fabricating a semiconductor light emitting element having on a substrate a semiconductor stack which comprises a first cladding layer of a first conductive type, an active layer and a second cladding layer of a second conductive type, the semiconductor stack further comprising a III-V group compound semiconductor layer formed on such substrate; a process for forming the III-V group compound semiconductor layer comprises the steps for forming on such substrate a first semiconductor layer made of a III-V group compound so as to have a projected form; and growing in vapor phase on the surface of the first semiconductor layer a second semiconductor layer made of a III-V group compound under a condition by which the growth rate in the direction parallel to the major plane of the substrate is larger than that in the direction perpendicular thereto; wherein the step of the vapor-phase growth includes a process for growing the second semiconductor layer so that the side planes thereof incline at an acute angle to the bottom plane thereof.
The method of the present invention is the one for fabricating a semiconductor light emitting element having on a substrate a semiconductor stack which comprises a first cladding layer of a first conductive type, an active layer and a second cladding layer of a second conductive type, the semiconductor stack further comprising a III-V group compound semiconductor layer formed on such substrate; where the III-V group compound semiconductor layer is obtained by forming on such substrate a first semiconductor layer made of a III-V group compound so as to have a projected form; and growing in vapor phase on the surface of the first semiconductor layer a second semiconductor layer made of a III-V group compound under a condition by which the growth rate in the direction parallel to the major plane of the substrate is larger than that in the direction perpendicular thereto, so that the side planes of the second semiconductor layer incline at an acute angle to the bottom plane thereof.
Since the method for fabricating a semiconductor light emitting element of the present invention allows the second semiconductor layer to grow so as to keep the acute angle between the side planes and bottom plane thereof when the III-V compound semiconductor layer is formed on the substrate, fusion of the second semiconductor layers individually grown from the adjacent first semiconductor layers will proceed in a gradual manner from the side close to the substrate. This successfully prevents the reaction gas from being shut out over the second semiconductor layer and reduces the size of the voids generable at the site of fusion.
Since the process is also beneficial in suppressing the stress applied to the second semiconductor layer at the time of the fusion of the portions thereof individually grown from the adjacent first semiconductor layers, the inclination of the c-axis of the semiconductor crystal will be suppressed, and defects generable in the lateral direction (in-plane direction of the substrate) within such semiconductor layer will be reduced.